
WZ-HFT: Market Data to Order in 12 Cycles. The Prototype Took 240 ns @ 50 MHz.
We have been building RISC-V cores, IP, VIP, accelerators and SoC reference designs. For WZ-HFT, we...
Aug 27, 20261 min read0 reactions0 comments
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We have been building RISC-V cores, IP, VIP, accelerators and SoC reference designs. For WZ-HFT, we...

We started by building a multi-model AI chip on SKY130. Then the chip taught us what...
WIOWIZ EDA Suite is now live The connected RTL frontend verification suite, in the cloud. Lint →...

A passing testbench confirms that the firmware finished. But did the RTL execute every instruction...
Most SoC evaluations start the same way. You receive RTL, documentation, and a list of tools to...
The Return of Frictionless GUI Verification Verification should not begin with fighting the...