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May 14, 2026Zero to One with VHDL and a Lattice iCEstick
This post is the first in a series on FPGA development with open-source tools. By the end you will...
May 14, 20268 min read0 reactions0 comments
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#vhdl
COBS decoder working
The COBS decoder for the Haifuraiya open source amateur satellite project is working. One of the...
Nov 27, 20221 min read0 reactions0 comments
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Nov 23, 2022Testbench first?
Writing the testbench first is a great idea that is hard to do every time. But, it will give you a...
Nov 23, 20221 min read0 reactions0 comments
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Nov 23, 2022COBS protocol decoder progress
We're busy in the lab updating the VHDL! The testbench is mostly ready for this, but it is still very...
Nov 23, 20221 min read2 reactions0 comments
COBS protocol decoder progress
Good news: The basics are working! Better news soon: AXI compliance coming along but not quite done.
Nov 18, 20221 min read0 reactions0 comments
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Nov 9, 2022State Machine Diagram for a Bus Upsizer
Did you know you can do diagrams with GitHub markdown using...
Nov 9, 20221 min read0 reactions0 comments
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Nov 13, 2022Progress on Open Source DVB-S2 FPGA Encoder
A post by Abraxas3d
Nov 13, 20221 min read3 reactions0 comments
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Nov 21, 2022Design Documentation for an Open Source COBS Decoder in VHDL
Design documentation for an open source COBS decoder in VHDL from Open Research Institute can be...
Nov 21, 20221 min read4 reactions0 comments
Adding Upsizer to axi_stream_width_converter
Today we started working on adding the upsizer case (where output bus width is larger than input bus...
Nov 6, 20221 min read2 reactions0 comments
Learning FPGA programming, key points for a software developer (part 1, the time)
It may be difficult for a software developer to pick up FPGA hardware programming. Here I explain a f...
Jul 21, 20204 min read10 reactions0 comments